# vhdl – collatz conjecture in verilog Integers and positives in 8 bits.
The Collatz conjecture says that, for any positive integer n greater than zero, if applicable
The function repeatedly:
• If n = 1, stop.
• If n is greater than one and even, divide n by 2 (n div 2).
• If n is greater than one and odd, multiply n by 3 and add 1 (3n + 1).
the process will make the number n converge to 1.
For example, if we start with n = 22, the generated sequence will be 22, 11, 34, 17, 52, 26, 13, 40, 20, 10, 5, 16, 8,
4, 2, 1. 15 steps are required, that is, the function is applied 15 times until the stop point is reached. Yes
We start with n = 6, the sequence will be 6, 3, 10, 5, 16, 8, 4, 2, 1, and the stop point is reached in 8 steps.
The system must receive a positive 8-bit integer as input through an input called date and calculate how many steps the stop point is reached, reporting this through an output
called steps. By definition, if the number is zero, the number of steps must also be zero.
The system has a bit input, called start. The system is on hold until it starts = 1.
In this case, the system must load the value of the data entry into an internal system register and perform the
transactions on the value of that registrar. After completing the operations, the amount
of steps in step output. You should not update this output until the process is complete. Once the calculation is finished, the system stops and displays the result. The system, however, also has an entry
called reset, which resets (at any time) the entire process when reset = 1.
Present, as output, the current value of n, to verify if the Conjecture is being applied
correct The current value of n must be available through an output called tempN. 